Computer Architecture Set 2
Free Online Best Computer Architecture MCQ Questions for improve your basic knowledge of Computer Architecture. This Computer Architecture set 2 test that contains 25 Multiple Choice Questions with 4 options. You have to select the right answer to a question.
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Question 1 |
Which representation is most efficient to perform arithmetic operations on the numbers?
A | Sign-magnitude |
B | 1’s complement |
C | 2’S complement |
D | None of Above |
Question 2 |
Which method of representation has two representations for ‘0’?
A | Sign-magnitude |
B | 1’s complement |
C | 2’S complement |
D | None of Above |
Question 3 |
When we perform subtraction on -7 and 1 the answer in 2’s complement form is _________
A | 1010 |
B | 1110 |
C | 110 |
D | 1000 |
Question 4 |
When we perform subtraction on -7 and -5 the answer in 2’s complement form is ________
A | 11110 |
B | 1110 |
C | 1010 |
D | 10 |
Question 5 |
Add #%01011101,R1 , when this instruction is executed then _________
A | The binary addition between the operands takes place |
B | The Numerical value represented by the binary value is added to the value of R1 |
C | The addition doesn’t take place, whereas this is similar to a MOV instruction |
D | None of Above |
Question 6 |
If we want to perform memory or arithmetic operations on data in Hexa-decimal mode then we use _________ symbol before the operand.
A | ~ |
B | ! |
C | $ |
D | * |
Question 7 |
When generating physical addresses from a logical address the offset is stored in __________
A | Translation look-aside buffer |
B | Relocation register |
C | Page table |
D | Shift register |
Question 8 |
The technique used to store programs larger than the memory is ____________
A | Overlays |
B | Extension registers |
C | Buffers |
D | Both Extension registers and Buffers |
Question 9 |
The unit which acts as an intermediate agent between memory and backing store to reduce process time is ___________
A | TLB’s |
B | Registers |
C | Page tables |
D | Cache |
Question 10 |
The interrupt-request line is a part of the ___________
A | Data line |
B | Control line |
C | Address line |
D | None of the mentioned |
Question 11 |
The return address from the interrupt-service routine is stored on the ___________
A | System heap |
B | Processor register |
C | Processor stack |
D | d) Memory |
Question 12 |
The signal sent to the device from the processor to the device after receiving an interrupt is ___________
A | Interrupt-acknowledge |
B | Return signal |
C | Service signal |
D | Permission signal |
Question 13 |
When the process is returned after an interrupt service ______ should be loaded again.
Register contents
Condition codes
Stack contents
Return addresses
A | i, iv |
B | ii, iii and iv |
C | iii, iv |
D | i, ii |
Question 14 |
The time between the receiver of an interrupt and its service is ______
A | Interrupt delay |
B | Interrupt latency |
C | Cycle time |
D | Switching time |
Question 15 |
In memory-mapped I/O ____________
A | The I/O devices and the memory share the same address space |
B | The I/O devices have a separate address space |
C | The memory and I/O devices have an associated address space |
D | A part of the memory is specifically set aside for the I/O operation |
Question 16 |
The usual BUS structure used to connect the I/O devices is ___________
A | Star BUS structure |
B | Multiple BUS structure |
C | Single BUS structure |
D | Node to Node BUS structure |
Question 17 |
The advantage of I/O mapped devices to memory mapped is ___________
A | The former offers faster transfer of data |
B | The devices connected using I/O mapping have a bigger buffer space |
C | The devices have to deal with fewer address lines |
D | No advantage as such |
Question 18 |
The system is notified of a read or write operation by ___________
A | Appending an extra bit of the address |
B | Enabling the read or write bits of the devices |
C | Raising an appropriate interrupt signal |
D | Sending a special signal along the BUS |
Question 19 |
The interrupt-request line is a part of the ___________
A | Data line |
B | Control line |
C | Address line |
D | None of Above |
Question 20 |
The return address from the interrupt-service routine is stored on the ___________
A | System heap |
B | Processor register |
C | Processor stack |
D | Memory |
Question 21 |
The signal sent to the device from the processor to the device after receiving an interrupt is ___________
A | Interrupt-acknowledge |
B | Return signal |
C | Service signal |
D | Permission signal |
Question 22 |
When the process is returned after an interrupt service ______ should be loaded again
i) Register contents
ii) Condition codes
iii) Stack contents
iv) Return addresses
A | i, iv |
B | ii, iii and iv |
C | iii, iv |
D | i, ii |
Question 23 |
The time between the receiver of an interrupt and its service is ______
A | Interrupt delay |
B | Interrupt latency |
C | Cycle time |
D | Switching time |
Question 24 |
If during the execution of an instruction an exception is raised then __________
A | The instruction is executed and the exception is handled |
B | The instruction is halted and the exception is handled |
C | The processor completes the execution and saves the data and then handle the exception |
D | None of Above |
Question 25 |
_____ is/are types of exceptions.
A | Trap |
B | Interrupt |
C | System calls |
D | All of Above |
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