Computer Architecture Set 1
Free Online Best Computer Architecture MCQ Questions for improve your basic knowledge of Computer Architecture. This Computer Architecture set 1 test that contains 25 Multiple Choice Questions with 4 options. You have to select the right answer to a question.
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Question 1 |
The instruction, Add #45,R1 does _______
A | Adds the value of 45 to the address of R1 and stores 45 in that address |
B | Adds 45 to the value of R1 and stores it in R1 |
C | Finds the memory location 45 and adds that content to that of R1 |
D | None of Above |
Question 2 |
Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
A | A |
B | B |
C | Both take the same time |
D | Insufficient information |
Question 3 |
The 8-bit encoding format used to store data in a computer is ______
A | ASCII |
B | EBCDIC |
C | ANCI |
D | USCII |
Question 4 |
In the case of, Zero-address instruction method the operands are stored in _____
A | Registers |
B | Accumulators |
C | Push down stack |
D | Cache |
Question 5 |
The Input devices can send information to the processor.
A | When the SIN status flag is set |
B | When the data arrives regardless of the SIN flag |
C | Neither of the cases |
D | Either of the cases |
Question 6 |
______ are numbers and encoded characters, generally used as operands.
A | Input |
B | Data |
C | Information |
D | Stored Values |
Question 7 |
______ are used to overcome the difference in data transfer speeds of various devices.
A | Speed enhancing circuitory |
B | Bridge circuits |
C | Multiple Buses |
D | Buffer registers |
Question 8 |
The control unit controls other units by generating ___________
A | Control signals |
B | Timing signals |
C | Transfer signals |
D | Command Signals |
Question 9 |
The clock rate of the processor can be improved by _________
A | Improving the IC technology of the logic circuits |
B | Reducing the amount of processing done in one step |
C | By using the overclocking method |
D | All of Above |
Question 10 |
A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______
A | Super-scaling |
B | Pipe-lining |
C | Parallel Computation |
D | None of Above |
Question 11 |
IBM developed a bus standard for their line of computers ‘PC AT’ called _____
A | IB bus |
B | M-bus |
C | ISA |
D | None of Above |
Question 12 |
Which memory device is generally made of semiconductors?
A | RAM |
B | Hard-disk |
C | Floppy disk |
D | Cd disk |
Question 13 |
Add #45, when this instruction is executed the following happen/s _______
A | The processor raises an error and requests for one more operand |
B | The value stored in memory location 45 is retrieved and one more operand is requested |
C | The value 45 gets added to the value on the stack and is pushed onto the stack |
D | None of Above |
Question 14 |
For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?
A | ISA |
B | ANSA |
C | Super-scalar |
D | All of Above |
Question 15 |
During the execution of the instructions, a copy of the instructions is placed in the ______
A | Register |
B | RAM |
C | System heap |
D | Cache |
Question 16 |
The ______ format is usually used to store data.
A | BCD |
B | Decimal |
C | Hexadecimal |
D | Octal |
Question 17 |
The small extremely fast, RAM’s are called as _______
A | Cache |
B | Heaps |
C | Accumulators |
D | Stacks |
Question 18 |
The ALU makes use of _______ to store the intermediate results.
A | Accumulators |
B | Registers |
C | Heap |
D | Stack |
Question 19 |
Which method/s of representation of numbers occupies a large amount of memory than others?
A | Sign-magnitude |
B | 1’s complement |
C | 2’s complement |
D | 1’s & 2’s compliment |
Question 20 |
The addressing mode which makes use of in-direction pointers is ______
A | Indirect addressing mode |
B | Index addressing mode |
C | Relative addressing mode |
D | Offset addressing mode |
Question 21 |
______ bus structure is usually used to connect I/O devices.
A | Single bus |
B | Multiple bus |
C | Star bus |
D | Rambus |
Question 22 |
To extend the connectivity of the processor bus we use ________
A | PCI bus |
B | SCSI bus |
C | Controllers |
D | Multiple bus |
Question 23 |
The bus used to connect the monitor to the CPU is ______
A | PCI bus |
B | SCSI bus |
C | Memory bus |
D | Rambus |
Question 24 |
The main virtue for using single Bus structure is ____________
A | Fast data transfers |
B | Cost effective connectivity and speed |
C | Cost effective connectivity and ease of attaching peripheral devices |
D | None of Above |
Question 25 |
A source program is usually in _______
A | Assembly language |
B | Machine level language |
C | High-level language |
D | Natural language |
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