MCQ » Computer Architecture Set 1

The clock rate of the processor can be improved by _________

______ are numbers and encoded characters, generally used as operands.

During the execution of the instructions, a copy of the instructions is placed in the ______

The control unit controls other units by generating ___________

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______

Which method/s of representation of numbers occupies a large amount of memory than others?

The main virtue for using single Bus structure is ____________

The instruction, Add #45,R1 does _______

The small extremely fast, RAM’s are called as _______

The ______ format is usually used to store data.

For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?

In the case of, Zero-address instruction method the operands are stored in _____

IBM developed a bus standard for their line of computers ‘PC AT’ called _____

The addressing mode which makes use of in-direction pointers is ______

Add #45, when this instruction is executed the following happen/s _______

To extend the connectivity of the processor bus we use ________

The ALU makes use of _______ to store the intermediate results.

Which memory device is generally made of semiconductors?

The bus used to connect the monitor to the CPU is ______

The Input devices can send information to the processor.

The 8-bit encoding format used to store data in a computer is ______

A source program is usually in _______

______ bus structure is usually used to connect I/O devices.

Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?

______ are used to overcome the difference in data transfer speeds of various devices.